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semiconductor group 1 08.94 tv-stereo-sound preliminary data bipolar ic tda 6612-2 p-dip-28-3 features the tda 6612-2 represents a complete tv-stereo system controlled by the i 2 c bus according to german tv-stereo standard. l all functions inclusive matrix adjustment are i 2 c bus controlled l inputs for am sound or nicam l scart-interface l independent headphones l universal clock generation circuit build-in l clipping detector build-in l volume control l high signal-to-noise ratio l extremely low total harmonic distortions l high security for the detection of the identification signals because of the digital interference suppression and the very narrow bandwidth type ordering code package tda 6612-2 q67000-a5097 p-dip-28-3 tda 6612-2x q67000-a5194 p-dso-28-1 p-dip-28-3 p-dso-28-1
semiconductor group 2 tda 6612-2 the ic is divided into three functional blocks 1 stereo sound processing with high performance (exceeds din 45500; suitable for nicam and cd) a) matrix for g-standard with crosstalk compensation controlled via the i 2 c bus b) additional single channel af input (for e.g. af signal according to l-standard) c) stereo scart interface according to ftz-official specification d) stereo loudspeaker signal section with ch1/ch2 switch, bass/treble control, quasi stereo/stereo base width expansion and separate loudspeaker volume control for left and right (balance) e) separate stereo head phone signal section with ch1/ch2 switch and volume control 2 tv-sound identification signal decoder consisting of: a) active pilot signal filter b) phase independent rectifier with very narrow bandwidth for evaluation of the identification signal c) digital integrator to reduce interferences by noise d) multiplexer for cyclical switch over between "stereo" or "dual" evaluation e) reference signal generation with externally synchronized pll synchronization with external h-sync pulse or 62.5-khz clock build-in crystal oscillator and external 4-mhz crystal external 4-mhz (or 1-mhz) clock signal 3 control section for: a) i 2 c bus interface with listen/talk function b) control of the complete af-sound signal detector c) read access to the clipping detector d) control of the identification signal decoder e) reading of the status of the identification signal decoder f) test modes
semiconductor group 3 tda 6612-2 circuit description signal section the audio signal processing in the matrix and the switch-over for multi channel tv-sound signals according to the two carrier system used in germany takes place in the matrix and switching sec- tions. crosstalk compensation is carried out in the sound 1 input stage. the crosstalk compensation range has an adjustment range of 3 db with a step width of 0.2 db. in addition to the two inputs for the demodulated sound carrier a two channel scart-input and an additional mono input (e.g. for demodulated l-standard sound) are provided. the two af (pin 1 and pin 2) inputs can be by- passed internally in such a way that decoded stereo sound of other audio systems (nicam) can be processed. the switching section includes also the scart-output with the possibility to select the sound 1 or 2 during the "dual" mode. the ch1/ch2-switches for the loudspeaker and headphone outputs are independently switchable. in the signal path for the volume control unit output there is the ch1/ch2-switch followed by two dif- ferent volume control units. the first has a control range from 0 to C 15 db with a step width of 1.25 db. in conjunction with the main volume control after bass and treble control a high immunity against overdriving the output stage is reached. the first volume control is used as a "pre-stage" of the main volume control in conjuntion with the clipping detector. this section is followed by a switchable quasi stereo stage which provides a stereophonic audio effect with mono signals due to a 180? phase shift at medium frequencies (about 1 khz) in one channel. the following bass control has a control range of +15/C12 db with a step width of 3 db. the cut-off frequency for each channel is set with an ex- ternal capacitor. the implemented switchable circuit for stereo base width expansion provides a three dimensional aural reception. this is realized with a 50% frequency dependent crosstalk with opposite phase of the signal between both channels. the circuit operates with the same cut-off fre- quency as the bass control, but the function is widely independent. the treble control has a step width of 3 db with an control range of +/C12 db. the cut-off frequency of the treble control is derived from one capacitor for each channel. the loudspeaker signal path is terminated with the loudspea- ker control, independently adjustable for left and right. with 57 steps of 1.25 db the adjustment ran- ge is 70 db, where step 57 activates the "mute" function. functions such as "balance" or "loud- ness" are realized by software and adjustment of the appropriate tone and volume controls. in the volume control unit there is a clipping detector. the status of the clipping detector can be evaluated via the i 2 c bus. therefore it is possible to implement an automatic volume control using the clipping detector and software implemented into the controller. after every evaluation the clipping bit is reset. therefore after a read access to the clipping bit a new evaluation of the clipping detector status is possible. the signal path for the headphones contains a volume control after the ch1/ch2-switch with a com- mon adjustment for left and right. thirty two steps of 2 db give an adjustment range of 62 db (31 x 2 db = 62 db, the 32nd step is mute). identification signal decoder the input of the identification signal decoder consists of an op-amp for the pilot signal with its side bands. an external lc-circuit is used. the signal is then passed to a phase independent active band-pass filter with a very narrow bandwidth (adjustable externally). this filter detects whether the lower side band of the pilot carrier, which is modulated with the identification signal, is present. the
semiconductor group 4 tda 6612-2 center frequency of the filter is switched between "dual" and "stereo" by a multiplexer. the multiplexing frequency is adjustable by software. if a side band is detected, the multiplexer stops. the interferences on the first "detected" criterion are suppressed by a digital integrator with a following comparator and can be read out via i 2 c bus (talk mode) as the "stereo" or "dual" mode. the control of the corresponding signal can be either directly internally or through the m c. all the necessary clock signal are derived from a fast setting pll which is synchronized by a reference frequency. this reference frequency must be sufficiently close to the horizontal frequency, but a rigid phase coupling is not required . therefore, alternatively the use of a crystal controlled 62.5- khz frequency commonly found in pll-tuning systems is possible. a further alternative for the clock signal generation is a build-in crystal oscillator with an external 4-mhz crystal or the use an external 1- or 4-mhz clock frequency. control section all functions are controlled via an i 2 c bus interface with "listen" / "talk" functions. the data bytes currently used are stored in a block of latches. the telegram structure is formed in the following manner: start condition - chip address - any number of bytes - stop condition the following conditions apply to the data bytes: before the actual data byte (with the adjustment information), always an i 2 c bus sub-address byte has to be transmitted. the i 2 c bus interface however is interpreting this sub-address byte as a data byte. example: the headphone volume is to be increased in a number of steps. within a telegram (i.e. without a new start condition) any different sub-addresses can be accessed. the changeover between "listen" and "talk" access to the ic however must always occur using the following sequence: stop condition - start condition - chip address. before each read access always a start condition and chip address (talk) must be transmitted. the data to be read out are then loaded into the i 2 c bus interface and can be transferred to the m c. right wrong start condition chip address 84 (hex) sub-addr. vol. hp 03 (hex) vol. step 8 08 (hex) sub-addr. vol. hp 03 (hex) vol. step 9 09 (hex) sub-addr. vol. hp 03 (hex) vol. step 10 0a (hex) stop condition start condition chip address 84 (hex) sub-addr. vol. hp 03 (hex) vol. step 8 08 (hex) vol. step 9 09 (hex) vol. step 10 0a (hex) stop condition
semiconductor group 5 tda 6612-2 chip address r/w = 0 ? read (listen) r/w = 1 ? write (talk) subaddress bytes control bytes a) volume input control qu-h = 0 pll synchronization with h-pulse; power on qu-h = 1 pll synchronization with crystal oszillator, additionally the bit "h-pulse" has to be set to "h" in switch byte ll msb ?????? lsb 1 000010r/w msb ?????? lsb volume input control xxxxx1 0 0 volume of left speaker xxxxx0 0 1 volume of right speaker xxxxx0 1 0 volume of headphones xxxxx0 1 1 treble / bass xxxxx1 0 1 switch byte i xxxxx1 1 1 switch byte ii xxxxx0 0 0 crosstalk adjustment xxxxx1 1 0 msb ? ? ???? lsb maximum volume max C 1 min + 1 minimum volume power on qu-h ch1/ch2 en ch1/ch2 sc 0000 mute iii qu-h ch1/ch2 en ch1/ch2 sc 0001 mute iii qu-h ch1/ch2 en ch1/ch2 sc 1011 mute iii qu-h ch1/ch2 en ch1/ch2 sc 1100 mute iii 0 0 0 00001
semiconductor group 6 tda 6612-2 ch1/ch2 en , ch1/ch2 sc are only activated if the matrix is in the dual mode (switch byte ll: matrix 0 = 1 and matrix 1 = 0 or matrix 0 = 1 , matrix 1 = 1 and the identification decoder is in the mode "dual") mute lll = 0 scart output are muted. mute lll = 1 scart output on; power on (will be overwritten by mute 1 = 0 equal to all audio outputs muted) mute lll is "or" wired with mute l. b) volume of left / right loudspeaker c) volume of headphones t0, t2 are test bits; these must be set to 0 for normal operation ch1/ch2 en ch1/ch2 sc scart output scart output pin 9 pin 10 0 0 1 1 0 1 0 1 sound 1 sound 2 sound 1 sound 2 sound 2 sound 1 sound 1 sound 2 msb ?????? lsb maximum volume max - 1 max - 15 max - 55 mute mute mute power on xx111111 xx111110 xx110000 xx001000 xx000111 xx000000 xx000xxx 00000001 msb ?????? lsb maximum volume max - 1 max - 15 max - 31 mute power on t2 t1 t0 1 1 1 1 1 t2 t1 t0 1 1 1 1 0 t2 t1 t0 1 0 0 0 0 t2 t1 t0 0 0 0 0 1 t2 t1 t0 0 0 0 0 0 00000001
semiconductor group 7 tda 6612-2 d) crosstalk compensation matrix (sound 1) e) treble/bass msb ?????? lsb max. amplification max - 1 gain 0 db min. gain min. gain power on 00011111 00011110 00010000 00000001 0000000x 00000001 msb ?????? lsb linear max. treble, lin. bass max. treble, lin. bass min. treble, lin. bass min. treble, lin. bass lin. treble, max. bass lin. treble, max. bass lin. treble, max. bass lin. treble, min. bass lin. treble, min. bass max. treble, max. bass min. treble, min. bass power on 10001000 11001000 11xx1000 01001000 00xx1000 10001101 100011x1 1000111x 10000100 100000xx 11xx11x1 00xx00xx 00000001 msb lsb msb lsb treble treble bass bass
semiconductor group 8 tda 6612-2 f) switch byte i mute l = 0 all af-outputs are muted (speakers, headphones, scart); power on mute l = 1 all af-outputs on mute ll = 0 loudspeaker outputs muted; power on mute ll = 1 loudspeaker outputs on mute l and mute ll are or gated with respect to the loudspeaker outputs mute l and mute lli are or gated with respect to the scart output ch1/ch2 ls = 0 sound 1 on the loudspeaker outputs; power on ch1/ch2 ls = 1 sound 2 on the loudspeaker outputs ch1/ch2 kh = 0 sound 1 on the headphone outputs; power on ch1/ch2 kh = 1 sound 2 on the headphone outputs ch1/ch2 ls and ch1/ch2 kh are only effective if the matrix is set to the position "dual sound". mono = 0 identification signal decoder is set to the position mono and held; power on mono = 1 normal operation if id-signal decoder scart = 0 normal tv-operation; power on scart = 1 scart playback; connection of scart inputs - af - outputs scart = 1 has priority over am = 1 (loudspeaker and head- phones) scart-d = 0 scart-playback stereo (mono); power on scart-d = 1 enable for the ch1/ch2 switch during scart playback. (only effective when scart = 1) am = 0 normal operation (g-standard) am = 1 am af-input is activated; power on am = 1 has priority over bypass = 1 qu-h, ch1/ch2 en , ch1/ch2 sc mute lll see chapter control bytes a). msb ? ? ? ? ? ? lsb mute i mute ii ch1/ch2 ls ch1/ch2 kh mono scart scart-d am mute i mute ii mute iii loudspeaker headphone scart output output output 0 0 0 muted muted muted 0 0 1 muted muted muted 0 1 0 muted muted muted 0 1 1 muted muted muted 1 0 0 muted on muted 1 0 1 muted on on 110on on muted 111on on on
semiconductor group 9 tda 6612-2 g) switch byte ii mpx period = 2 s signifies: id-signal decoder searches 1 second dual and 1 second stereo. it is inprinciple permitted to make with given c 25, 26 the mpx-period higher than indicated, but not lower. quasi stereo = 0 quasi stereo off; power on quasi stereo = 1 quasi stereo on bb = 0 stereo base width expansion off; power on bb = 1 stereo base width expansion on; h-pulse = 0 id-signal decoder synchronization with f h = 15.625 khz; power on h-pulse = 1 id-synchronization with 4 x f h (has to be set to 1 during operation with crystal or 4-mhz reference frequency) matrix 0 matrix1 matrix status 0 0 mono power on 0 1 stereo 1 0 dual 1 1 automatic according to id-signal decoder bypass = 0 normal operations (g-standard) bypass = 1 matrix is bridge so that left/right signals can be fed; power on (am = 1 has priority over bypass = 1) msb ?? ???? lsb mpx0 mpx1 quasi-st bs h-pulse matrix 0 matrix 1 bypass mpx0 mpx1 mpx-period recommended c 25, 26 permissible crystal tolerance 0 0 2 s power on 1 m f 0 1 4 s 2.2 m f 1 0 8 s 4.7 m f special for crystal operation recommended adjustments: 0 0 2 s 470 nf 40 ppm 0 1 4 s 330 nf 70 ppm
semiconductor group 10 tda 6612-2 priority list of setting bits 1. mute l 2. mute ll (only with regard to the loudspeaker output) 3. scart 4. am 5. bypass 6. matrix 0, 1 h) talk mode t3 - t5 are test bits ms ?????? lsb st d t3t4t5clx x 0 0 decoder detects mono 1 0 decoder detects stereo 0 1 decoder detects dual 1 1 internally inhibited cl = 1 the signal path for the loudspeaker reached the clipping level (the bit cl is automatical reset)
semiconductor group 11 tda 6612-2 pin functions pin no. function 1 af-input mono, left, sound 1 (may be balanced) 2 bias for af-operating point 3 af-input right, sound 2 4 54-khz input 5 54-khz filter 6 af-input (l-standard) 7 af-input scart left (sound 1) 8 af-input scart right (sound 2) 9 af-output scart (mono, sound 1, left) 10 af-output scart (mono, sound 2, right) 11 phase shifter quasi stereo 12 phase shifter quasi stereo 13 cut-off frequency bass (base width) left 14 cut-off frequency bass (base width) right 15 af-output, loudspeaker right 16 af-output, loudspeaker left 17 cut-off frequency treble left 18 cut-off frequency treble right 19 af-output, headphones right 20 af-output, headphones left 21 + v s (supply voltage) 22 i 2 c bus scl 23 i 2 c bus sda 24 input h-pulse (4 x h-pulse), crystal oscillator 25 filter id-signal decoder 26 filter id-signal decoder 27 pll-filter id-signal decoder 28 ground
semiconductor group 12 tda 6612-2 block diagram
semiconductor group 13 tda 6612-2 pll filter id-signal decoder (pin 27) filter id-signal decoder (pin 25/26)
semiconductor group 14 tda 6612-2 h-pulse/crystal oscillator (pin 24) i 2 c bus sda (pin 23)
semiconductor group 15 tda 6612-2 i 2 c bus scl (pin 22) af-outputs headphones (pin 19/20) loudspeaker (pin 15/16) scart (pin 9/10)
semiconductor group 16 tda 6612-2 cut-off frequency treble (pin 17/18) cut-off frequency bass (pin 13/14)
semiconductor group 17 tda 6612-2 phase advancer quasi stereo (pin 11/12)
semiconductor group 18 tda 6612-2 af-inputs scart (pin 7/8) af-input am (pin 6)
semiconductor group 19 tda 6612-2 54-khz filter (pin 4/5) af-input (pin 3)
semiconductor group 20 tda 6612-2 input for af-unit bias blocking capacitor (pin 2) af-input (pin 1)
semiconductor group 21 tda 6612-2 absolute maximum ratings t a = 0 to 70 o c; all voltages relatives to v ss parameter symbol limit values unit remarks min. max. supply voltage v 21 014v max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage max. dc-voltage v 1 v 2 v 3 v 4 v 6 v 7 v 8 v 11 v 12 v 13 v 14 v 17 v 18 v 22 v 23 v 24 v 25 v 26 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v 21 v v v v v v v v v v v v v v v v v v max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current max. dc-current i 5 i 9 i 10 i 15 i 16 i 19 i 20 i 27 0 0 0 0 0 0 0 0 2 2 2 2 2 2 2 1 ma ma ma ma ma ma ma ma
semiconductor group 22 tda 6612-2 absolute maximum ratings (contd) parameter symbol limit values unit remarks min. max. esd-voltage v esd C 2 2 kv hbm ( r = 1.5 k w, c = 100 pf) esd-voltage v esd7,8,9,10 C 6 6 kv hbm ( r = 1.5 k w, c = 100 pf) junction temperature t j 150 o c storage temperature t stg C 40 125 o c thermal resistance system ambient r th sa 53 k/w operating range supply voltage v 6 10 13.2 v ambiente temperature t a 070 o c input frequency range f i 0.01 20 khz
semiconductor group 23 tda 6612-2 characteristics v s = 12 v; t a = 25 o c, audio reference level 0 dbC250 mvrms, if not differently defined. i 2 c bus preset: start - 84 - 01,3f - 0 2,3f - 04,00 - 0 3,1f - 0 5,88 - 0 6,10 - 07,c8 - 00,01 - stop chip address - vol lsi 63 - vol lsr 63 - vol vls - vol hp 31 - sound lin adjust 0db - mute i, mute ii, mono - bypass the basic setting for each point in the specification is always preset; only settings which deviate from this are given in the test conditions. details in italics only provide explanation of the hexadecimal codes. if switch byte are mentioned only the bit status and activated features are indicated. parameter symbol limit values unit test condition (in accordance with test circuit 1) min. typ. max. current consumption i 21 58. 80 ma signal section max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain max. gain v 16-1 v 15-3 v 20-1 v 19-3 v 16-3 v 15-3 v 20-3 v 19-3 v 16-1 v 20-1 v 16-7 v 15-8 v 20-7 v 19-8 v 16-6 v 15-6 v 20-6 v 19-6 C 2 C 2 C 2 C 2 C 2 C 2 C 2 C 2 4 4 C 2 C 2 C 2 C 2 C 2 C 2 C 2 C 2 0 0 0 0 0 0 0 0 6 6 0 0 0 0 0 0 0 0 2 2 2 2 2 2 2 2 8 8 2 2 2 2 2 2 2 2 db db db db db db db db db db db db db db db db db db 00,02; v 1 = 01 matrix: stereo 00,02; v 1 = 01 matrix: stereo 00,02; v 1 = 0 matrix: stereo 00,02; v 1 = 0 matrix: stereo 00,02; v 3 = 0 matrix: stereo 00,02; v 3 = 0 matrix: stereo 07,cc, scart 07,cc, scart 07,cc, scart 07,cc, scart 07,c9, am 07,c9, am 07,c9, am 07,c9, am
semiconductor group 24 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. gain gain gain gain gain gain gain v 9-1 v 10-3 v 9-3 v 10-3 v 9-1 v 10-6 v 9-6 C 2 C 2 C 2 C 2 4 C 2 C 2 0 0 0 0 6 0 0 2 2 2 2 8 2 2 db db db db db db db 00,02; v 1 = 0 matrix: stereo 00,02; v 1 = 0 matrix: stereo 00,02; v 1 = 0 matrix: stereo 07,c9, am min. gain main control min. gain main control min. gain 1st. control min. gain 1st. control min. gain min. gain v 16-1 v 15-3 v 16-1 v 15-3 v 20-1 v 19-3 C 17 C 17 C 70 C 70 C 15 C 15 C 62 C 62 C 65 C 65 C 13 C 13 C 57 C 57 db db db db db db 01,08-02,08 vol lsi 8 C vol lsr 8 01,08-02,08 vol lsi 8 C vol lsr 8 04,18 vol vls 24 04,18 vol vls 24 03,01, vol hp 1 03,01, vol hp 1
semiconductor group 25 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. analogous values are valid for feed in at the pins 6, 7 and 8 channel tracking error channel tracking error d v 15-16 d v 19-26 2 2 db db 01,3f to 01,24 02,3f to 02,24 vol lsl 63-36 C vol lsr 63-36 03,1f to 03,13 vol hp 31-19 step width vol 15 step width vol 16 step width vol 15 step width vol 16 step width vol 19 step width vol 20 d v 15 d v 16 d v 15 d v 16 d v 19 d v 20 0 0 0 0 0 0 1.25 1.25 1.25 1.25 2 2 2.5 2.5 2.5 2.5 4 4 db db db db db db 01,x-01,(x 1) vol lsi x C vol lsi (x 1) 02,x-02,(x 1) vol lsr x C vol lsr (x 1) 04,x-04,(x 1) vol vls x C vol vls (x 1) 04,x-04,(x 1) vol vls x C vol vls (x 1) 03,x-03,(x 1) vol hp x C vol hp (x 1) 03,x-03,(x 1) vol hp x C vol hp (x 1) matrix adjustment matrix adjustment matrix adjustment matrix adjustment matrix adjustment matrix adjustment v 16-1 v 20-1 v 9-1 v 16-1 v 20-1 v 9-1 2.5 2.5 2.5 C 3.5 C 3.5 C 3.5 3 3 3 C 3 C 3 C 3 3.5 3.5 3.5 C 2.5 C 2.5 C 2.5 db db db db db db 06,1f, adjust. max 06,1f, adjust. max 06,1f, adjust. max 06,01, adjust. min 06,01, adjust. min 06,1f, adjust. max adjust. step width d v 16 0.1 0.2 0.3 db 06,x-06,(x 1) adjust. x C adjust. (x 1)
semiconductor group 26 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. adjust. step width adjust. step width d v 20 d v 9 0.1 0.1 0.2 0.2 0.3 0.3 db db 06,x-06,(x 1) adjust. x C adjust. (x 1) 06,x-06,(x 1) adjust. x C adjust. (x 1) bass boost bass boost bass cut bass cut v 16-1 v 15-3 v 16-1 v 15-3 13 13 15 15 C 12 C 12 db db db db 05,8 f; f i = 40 hz bass max, treble lin. 05,8 f; f i = 40 hz bass max, treble lin. 05,8 f; f i = 40 hz bass max, treble lin. 05,8 f; f i = 40 hz bass max, treble lin. step width bass step width bass d v 15 d v 16 1 1 3 3 5 5 db db 05,8x-05,8 (x 1) bass x C bass (x 1) 05,8x-05,8 (x 1) bass x C bass (x 1)
semiconductor group 27 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. treble boost treble boost treble cut treble cut v 16-1 v 15-3 v 16-1 v 15-3 10 10 12 12 C 12 C 12 db db db db 05,8 f; f i = 15 hz treble max, bass lin. 05,8 f; f i = 15 hz treble max, bass lin. 05,8 f; f i = 15 hz treble max, bass lin. 05,8 f; f i = 15 hz treble max, bass lin. step width bass step width bass d v 15 d v 16 1 1 3 3 5 5 db db 05,x8-05 (x 1)8 treble x C treble (x 1) 05,x8-05 (x 1)8 treble x C treble (x 1) linearity sound linearity sound d v 15 d v 16 2 2 db db 05,88; f i = 40 hz C 15 khz treble, bass lin. 05,88; f i = 40 hz C 15 khz treble, bass lin. detection level of the clipping detector v 1 580 mvrms 05,8 f; f i = 40 hz treble lin, bass max. 01,2f - 02,2f vol lsl 47 C vol lsr 47 the same values are valid if the test signals are applied at pin 3, 6, 7 or 8 channel separation channel separation of the clipping channel separation d v 15-16 d v 19-20 d v 9-10 50 50 50 db db db v 3 or v 8 = 600 mvrms v 3 or v 8 = 600 mvrms v 3 or v 8 = 600 mvrms cross talk attenuation switch a i interf / q rms 60 db v i rms = 0 v i interf, 3,6 = 600 mvrms v i interf, 7,8 = 2 vrms
semiconductor group 28 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. attenuation mute attenuation mute attenuation mute attenuation mute attenuation mute attenuation mute attenuation mute attenuation mute a 1-16 a 1-16 a 1-16 a 3-15 a 3-15 a 3-15 a 1-20 a 1-20 80 80 80 80 80 80 80 80 db db db db db db db db 01,00 - 02,00 vol lsi 0 C vol lsr 0 v 1 = 600 mvrms 07,48; v 1 = 600 mvrms mute i: 0 07,88; v 1 = 600 mvrms mute ii: 0 01,00 - 02,00 vol lsi 0 -vol lsr 0 v 3 = 600 mvrms 07,48; v 3 = 600 mvrms mute i: 0 07,88; v 3 = 600 mvrms mute ii: 0 03,00; v 1 = 600 mvrms vol hp 0 07,48; v 1 = 600 mvrms mute i: 0
semiconductor group 29 tda 6612-2 characteristics (contd) *) the tone control is possible over the full functional range if 04, 18, vol vls 24 parameter symbol limit values unit test condition min. typ. max. attenuation mute attenuation mute a 3-19 a 3-19 80 80 db db 03,00; v 3 = 600 mvrms mute i: 0 07,48; v 1 = 600 mvrms mute i: 0 analogous values are valid for feed in at pins 6, 7, 8; v 7,8 = 2 vrms; v 6 = 600 mvrms attenuation mute attenuation mute attenuation mute attenuation mute a 3-10 a 1-9 a 6-10 a 6-9 80 80 80 80 db db db db 07,48; v 3 = 600 mvrms mute i: 0 07,48; v 1 = 600 mvrms mute i: 0 07,49; v 6 = 600 mvrms mute i: 0 , am 07,49; v 6 = 600 mvrms mute i: 0 , am max. input voltage max. input voltage max. input voltage max. input voltage max. input voltage*) max. input voltage*) v 6 v 3 v 3 v 1 v 7 v 8 600 600 600 300 2 2 mvrms mvrms mvrms mvrms vrms vrms thd 15, 16 = 1% thd 15 = 1% thd 16 = 1% thd 16 = 1%; 00,02 matrix; stereo thd 16 = 3%; 07, cc, scart thd 15 = 1%; 07, cc, scart
semiconductor group 30 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. distortion distortion distortion distortion thd 19 thd 20 thd 19 thd 20 0.01 0.01 0.01 0.01 0.1 0.1 0.1 0.1 % % % % v 3 = 250 mvrms v 1 = 250 mvrms v 3 = 250 mvrms; 03,15 vol hp 21 v 3 = 250 mvrms; 03,15 vol hp 21 analogous values are valid for feed in at pins 6, 7, 8; v 7,8 = 600 vrms; v 6 = 250 mvrms distortion distortion distortion distortion distortion distortion thd 16 thd 15 thd 15 thd 15 thd 16 thd 15 0.01 0.01 0.01 0.01 0.1 0.1 0.1 0.1 0.2 0.2 0.4 0.4 % % % % % % v 1 = 250 mvrms; v 3 = 250 mvrms v 1 = 250 mvrms; 01,2f-02,2f vol lsi 47 vol lsr 47 v 3 = 250 mvrms; 01,2f-02,2f vol lsi 47 vol lsr 47 v 1 = 250 mvrms; 05,xx any sound v 3 = 250 mvrms; 05,xx any sound analogous values are valid for feed in at pins 6, 7, 8; v 7,8 = 600 mvrms; v 6 = 250 mvrms distortion distortion distortion distortion thd 10 thd 9 thd 10 thd 9 0.01 0.01 0.01 0.01 0.1 0.1 0.1 0.1 % % % % v 3 = 250 mvrms v 1 = 250 mvrms v 6 = 250 mvrms; 07,c9, am v 6 = 250 mvrms; 07,c9, am
semiconductor group 31 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. anti-phase cross talk base width anti-phase cross talk base width d v 16-15 d v 15-16 0.5 0.5 0.55 0.55 v 3 = 600 mvrms f i = 2 khz; 00, 11 base width v 1 = 600 mvrms f i = 2 khz; 00, 11 base width base width phase base width phase f 16-15 f 15-16 150 150 180 180 210 210 deg deg v 1 = 600 mvrms f = 2 khz; 00, 11 base width v 3 = 600 mvrms f = 2 khz; 00, 11 base width phase rotation quasi stereo phase rotation quasi stereo phase rotation quasi stereo f 16-15 f 16-15 f 16-15 0 130 C 30 10 180 10 40 230 0 deg deg deg v 3,1 = 600 mvrms f = 40 khz; 00, 21 quasi stereo v 3,1 = 600 mvrms f = 700 khz; 00, 21 quasi stereo v 3,1 = 600 mvrms f = 15 khz; 00, 21 quasi stereo signal-to-noise ratio signal-to-noise ratio signal-to-noise ratio signal-to-noise ratio a s/n16 a s/n15 a s/n16 a s/n15 85 85 60 60 94 94 70 70 db db db db v n rms 20 hz-20 khz; v 1 = 0.6 vrms v n rms 20 hz-20 khz; v 3 = 0.6 vrms v n rms 20 hz-20 khz; v 1 = 0.6 vrms 01,27-02,27 vol lsi 39-vol lsr 39 v n rms 20 hz-20 khz; v 3 = 0.6 vrms 01,27-02,27 vol lsi 39 C vol lsr 39
semiconductor group 32 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. output noise voltage output noise voltage v n16 v n15 12 12 33 33 m vrms m vrms v n rms 20 hz-20 khz; 01,00-02,00 vol lsi 0-vol lsr 0 v n rms 20 hz-20 khz; 01,00-02,00 vol lsi 0-vol lsr 0 signal-to-noise ratio signal-to-noise ratio signal-to-noise ratio signal-to-noise ratio a s/n20 a s/n19 a s/n20 a s/n19 85 85 65 65 94 94 70 70 db db db db v n rms 20 hz-20 khz; v 1 = 0.6 vrms v n rms 20 hz-20 khz; v 3 = 0.6 vrms v n rms 20 hz-20 khz; v 1 = 0.6 vrms 03, 10, vol hp 16 v n rms 20 hz-20 khz; v 3 = 0.6 vrms 03, 10, vol hp 16 output noise voltage output noise voltage v n20 v n19 12 12 33 33 m vrms m vrms v n rms 20 hz-20 khz; 03, 00, vol hp 0 v n rms 20 hz-20 khz; 03, 00, vol hp 0 signal-to-noise ratio signal-to-noise ratio a s/n9 a s/n10 90 90 97 97 db db v n rms 20 hz-20 khz; v 1 = 0.6 vrms v n rms 20 hz-20 khz; v 1 = 0.6 vrms
semiconductor group 33 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit dc/pop d 1 bit d v 16 d v 15 d v 16 d v 15 d v 16 d v 15 d v 19 d v 20 4 4 4 4 2 2 4 4 mv mv mv mv mv mv mv mv 01, x-01, x 1 vol lsi x C vol lsi (x 1) 02, x-02, x 1 vol lsr x C vol lsr (x 1) 04, x-04, x 1 vol vls x C vol vls (x 1) 04, x-04, x 1 vol vls x C vol vls (x 1) 05, x-05, x 1 tonex C tone (x 1) 05, x-05, x 1 tonex C tone (x 1) 03, x-03, x 1 vol hp x C vol hp (x 1) 03, x-03, x 1 vol hp x C vol hp (x 1) design-related data input resistance input resistance input resistance input resistance input resistance r 7 r 8 r 6 r 3 r 1 35 35 20 22 22 k w k w k w k w k w output resistance output resistance output resistance output resistance output resistance output resistance r 19 r 20 r 15 r 16 r 9 r 10 70 70 70 70 70 70 w w w w w w
semiconductor group 34 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max. id-signal decoder gain filter op-amplif. v 5 13 14 15 db v if = 80 mvpp 1 max. input voltage v 5 600 mvpp function 2 vco-voltage pll vco-voltage pll vco-voltage pll vco-voltage pll vco-voltage pll vco-voltage pll v 27 v 27 v 27 v 27 v 27 v 27 1.3 2 1.3 2 3 3 4 4.7 4.7 4 v v v v v v f 24 = 14.6 khz; v 24 = 2.5 v f 24 = 15.625 khz; v 24 = 2.5 v f 24 = 16.6 khz; v 24 = 2.5 v f 24 = 58.4 khz; v 24 = 2.5 v 00,08, h-pulse f 24 = 66.4 khz; v 24 = 2.5 v 00,08, h-pulse 00,08 - 04.81 h-pulse; quartz cont. function 2 2 2 2 2 4 v 25 or v 26 when v 5 = 0 v 25 * or v 26 * when v 5 = 100 mvpp; m = 50% id-filter gain id-filter gain v kt filter v kt filter 3.4 3.4 6.8 6.8 v v f 5 = pilot signal dual; i 2 c-talk: dual f 5 = pilot signal stereo; i 2 c-talk: stereo 2 2 v 5 test = v 25 (v 5 = 0) d v 25 ; v 26 test = v 26 (v 5 = 0) d v 26 v filter gain v 25 v 25 * C () 2 v 26 v 26 * C () 2 + v 5 ---------------------------------------------------------------------------------- - =
semiconductor group 35 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max. detection threshold detection threshold detection threshold detection threshold d v 25 C d v 25 d v 26 C d v 26 900 900 900 900 mv mv mv mv i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual i 2 c-talk: stereo or dual 3 3 3 3 mono threshold mono threshold mono threshold mono threshold d v 25 C d v 25 d v 26 C d v 26 0 0 0 0 100 100 100 100 mv mv mv mv i 2 c-talk: mono i 2 c-talk: mono i 2 c-talk: mono i 2 c-talk: mono 3 3 3 3 response of detection response of detection t det t det 1/4 1/4 1/2 1/2 t mpx t mpx i 2 c-talk: stereo or dual; d v 25 = 1 v i 2 c-talk: stereo or dual; d v 26 = 1 v 3 3
semiconductor group 36 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition test circuit min. typ. max. switching threshold f ref -input switching threshold f ref -input v h in l v h in l 0 3.5 1.5 v 21 v v 2 2 amplitude crystal oscillator v 24 0.3 vpp f 0 = 4.00000 mhz serial resonance 4 ext. 1- or 4 mhz- clock signal v 24 2 vpp 3 crystal current i c 0.29 0.35 0.42 marms r c = 40 w multiplexer clock multiplexer clock multiplexer clock t mpx t mpx t mpx 2.17 4.34 8.68 s s s 09,08, mpx = 2 s 09,48, mpx = 4 s 09,88, mpx = 8 s design-related data filter output resistance r 25,26 110 k w f ref -input resistance r 24 800 w input impedance crystal oscillator z 24 C 600 C 500 C 400 w crystal serial resistance crystal serial resistance r c1 r c3 300 100 w w p tot = 1 m w, fundamental p tot = 1 m w 3rd harmonic spurious wave spacing (fundamental wave to harmonic and nonharmonic signals) 20 db p tot = 1 m w f < 15 mhz
semiconductor group 37 tda 6612-2 characteristics (contd) parameter symbol limit values unit test condition min. typ. max. i 2 c bus (scl, sda) scl, sda edges rise time fall time t r t f 1 300 m s ns shift register clock pulse scl frequency h-pulse width l-pulse width f scl t high t low 0 4 4 100 khz m s m s start set-up time hold time t susta t hdsta 4 4 m s m s stop set-up time bus free time t sudat t hddat 1 1 m s m s data transfer set-up time hold time t sudat t hddat 1 600 m s ns input scl, sda input voltage input current v qh v ql v qh v ql 3 5.5 1.5 50 100 v v m a m a output sda (open collector) output voltage v qh v ql 5.4 0.4 v v r l = 2.5 k w i ql = 3 ma
semiconductor group 38 tda 6612-2 test circuit 1
semiconductor group 39 tda 6612-2 test circuit 2
semiconductor group 40 tda 6612-2 test circuit 3
semiconductor group 41 tda 6612-2 test circuit 4
semiconductor group 42 tda 6612-2 application circuit 1
semiconductor group 43 tda 6612-2 application circuit 2
semiconductor group 44 tda 6612-2 application circuit 3
semiconductor group 45 tda 6612-2 i 2 c bus timing diagram t susta setup time (start) t hdsta hold time (start) t high h-pulse width (clock) t low l-pulse width (clock) t sudat setup time (data transfer) t hddat hold time (data transfer) t susto setup time (stop) t buf bus free time t f fall time t r rise time all times referred to v ih and v il values.
semiconductor group 46 tda 6612-2 plastic package, p-dip-28-1 (plastic dual in-line package) gpd05037 package outlines
semiconductor group 47 tda 6612-2 plastic package, p-dso-28.350 (smd) (plastic dual small outline) gps05182 sorts of packing package outlines for tubes, trays etc. are contained in our data book package information dimensions in mm smd = surface mounted device

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